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Do you DARE? Europe bets once again on RISC-V for supercomputing sovereignty

Orange Pi RV2 is a single-board PC with an 8-core RISC-V processor

Linus Torvalds calls RISC-V code from Google engineer 'garbage' and that it 'makes the world actively a worse place to live' — Linux honcho puts dev on notice for late submissions, too

Linus Torvalds calls RISC-V code from Google engineer 'garbage' and that it 'makes the world actively a worse place to live' — Linux honcho puts dev on notice for late submissions, too

I Built a 64-bit VM with custom RISC architecture and compiler in Java

Let's Learn x86-64 Assembly! Part 0

Interesting info about Kimi K2

GlobalFoundries to make RISC-V CPUs — fab acquires MIPS, will integrate RISC-V and AI IP into its portfolio

Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for embedded RISC-V systems with focus on a formally verified and auditable firmware

Introducing felix86 - Run x86-64 programs on RISC-V Linux.

Chinese project aims to run RISC-V code on AMD Zen processors

FreeRTOS

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FreeRTOS-Kernel

FreeRTOS kernel files only, submoduled into https://github.com/FreeRTOS/FreeRTOS and various other repos.

UberGuidoZ

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Flipper

Playground (and dump) of stuff I make or modify for the Flipper Zero

risc0

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risc0

RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.